EP80579 Datasheet, PDF (1539/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 37-136.IPV6_ADDR0BYTES_1_4 – IPv6 Address Table Register (0x5880), Bytes 1 - 4
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 5880h
Offset End: 5883h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 5880h
Offset End: 5883h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 5880h
Offset End: 5883h
Size: 32 bits
Default: XXXXXXXXh
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
IPV6ADDR0 IPV6 Address0, bytes 1 - 4
Sticky
Bit Reset
Value
Xh
Bit Access
RW
37.6.7.7
IPV6_ADDR0BYTES_5_8 – IPv6 Address Table Register,
Bytes 5 - 8
The IPv6 Address Table is used to store the IPv6 addresses for ARP/IPv6 Request
packet and Directed IPv6 packet wake up and it has the following format
• Address 0x5880: IPV6 ADDR0, bytes 1 - 4 (Table 37-136)
• Address 0x5884: IPV6 ADDR0, bytes 5 - 8 (Table 37-137)
• Address 0x5888: IPV6 ADDR0, bytes 9 - 12 (Table 37-138)
• Address 0x588F: IPV6 ADDR0, bytes 13 - 16 (Table 37-139)
Table 37-137.IPV6_ADDR0BYTES_5_8 – IPv6 Address Table Register, Bytes 5 - 8
Description:
View: PCI 1
BAR: CSRBAR
Bus:Device:Function: M:0:0
Offset Start: 05884h
Offset End: 5887h
View: PCI 2
BAR: CSRBAR
Bus:Device:Function: M:1:0
Offset Start: 05884h
Offset End: 5887h
View: PCI 3
BAR: CSRBAR
Bus:Device:Function: M:2:0
Offset Start: 05884h
Offset End: 0588Fh
Size: 32 bits
Default: XXXXXXXXh
Power
Well:
GbE0: Aux
Gbe1/2: Core
Bit Range Bit Acronym
Bit Description
31 : 00
IPV6ADDR1 IPV6 Address, bytes 5 - 8
Sticky
Bit Reset
Value
X
Bit Access
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1539