EP80579 Datasheet, PDF (1060/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
27.3.3.4 Offset 08h: PM1_TMR - Power Management 1 Timer Register
Table 27-14. Offset 08h: PM1_TMR - Power Management 1 Timer Register
Description:
View: PCI
BAR: PMBASE (IO)
Bus:Device:Function: 0:31:0
Offset Start: 08h
Offset End: B8h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 : 24
23 : 00
Bit Acronym
Bit Description
Sticky
Reserved
TMR_VAL
Reserved. Will always read as 0.
This read-only field returns the running count of the PM
timer. This counter runs off a 3.579545 MHz clock
(derived from 14.31818 MHz divided by 4). It is reset
(to 0) during a PCI reset, and then continues counting
as long as the system is in the S0 state. Hence, it is
highly likely that a read to this register after reset will
yield a non-zero value. After an S1 state, the counter
will not be reset (it will continue counting from the last
value in S0 state).
Anytime bit 22 of the timer goes HIGH to LOW (bits
referenced from 0 to 23), the TMROF_STS bit is set. The
High-to-Low transition will occur every 2.3435 seconds.
Writes to this register have no effect.
Bit Reset
Value
00h
00h
Bit Access
RO
27.3.3.5 Offset 10h: PROC_CNT - Processor Control Register
Table 27-15. Offset 10h: PROC_CNT - Processor Control Register (Sheet 1 of 3)
Description:
View: PCI
BAR: PMBASE (IO)
Bus:Device:Function: 0:31:0
Offset Start: 10h
Offset End: 10h
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
31 : 18
17
16 : 09
08
Bit Acronym
Bit Description
Sticky
Reserved Reserved
THTL_STS
0 = No clock throttling is occurring (maximum
processor performance).
1 = Indicates that the clock state machine is throttling
the CPU performance. This could be due to the
THT_EN bit or the FORCE_THTL bit being set.
Reserved Reserved
FORCE_THTL
Software can set this bit to 1 to force the throttling.
0 = The throttling (at a duty cycle specified in
PROCHOT_DTY) does not start immediately and
does generate an SMI#.
1 = The throttling (at a duty cycle specified in
PROCHOT_DTY) starts immediately and does not
generate an SMI#.
Bit Reset
Value
00h
0h
00h
0h
Bit Access
RO
RW
Intel^® EP80579 Integrated Processor Product Line Datasheet
1060
August 2009
Order Number: 320066-003US