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EP80579 Datasheet, PDF (727/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line
Intel® EP80579 Integrated Processor
Note:
7. The keyboard controller emulation code is executed at exit. It determines if the
conditions are correct to return a byte to the system (e.g., emulated OBF indicates
empty, keyboard interface not disabled, etc.). If not, the emulation exits awaiting
the next event.
8. The queue of data to be sent from the keyboard to the system is found to contain a
byte to be returned.
9. Given the typical keyboard controller configuration, it is translated from SS2 to
SS1.
End of Setup.
10. The byte to be returned is stored in the emulated output buffer.
11. The emulation does the out to the port to enable IRQ 1.
12. The emulation exits.
13. time passes
14. The system code services the interrupt and reads port 60h.
15. The UHCI traps the read and causes an SMI trap.
16. The trap is determined to be caused by the read from port 60h (TBY60R in
LEGSUP).
17. The emulation code clears the interrupt register thus turning off IRQ 1 and / or IRQ
12.
The emulation code can validly do this each time there is a read from 60h since that is
what the keyboard controller would do as well. (There is no time where both IRQ 1 and
IRQ 12 must be asserted simultaneously by either the kbc or the emulated kbc. This
would be a violation of the kbc/system protocol.)
18.5
Event Reporting via SMLink/SMBus
The CMI has SMLINK signals to support TCO compatible mode. Event reporting is
accomplished via the SMLINK signals.
18.5.1 Overview
18.5.1.1
TCO Compatible Mode
The CMI can function directly with a LAN controller to report message to a network
management console without the aid of the system CPU. This is crucial in cases where
the CPU is malfunctioning or cannot function due to being in a low-power state.
The basic scheme is to send specific messages via the SMLink Interface to the LAN.
Upon receiving the SMLink message, the LAN has a prepared ethernet message that it
can send to a network management console. The prepared message is stored in a non-
volatile memory connected directly to the LAN.
Messages are sent by the CMI to the LAN either because a specific event has occurred
(see Table 18-13), or they are sent periodically. The event messages have exactly the
same form.
August 2009
Order Number: 320066-003US
Intel® EP80579 Integrated Processor Product Line Datasheet
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