EP80579 Datasheet, PDF (62/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Contents
16-126 Offset 3Dh: INTRPIN - Interrupt Pin Register ...................................................... 508
16-127 Offset 40h: EDMACTL - EDMA Control Register ................................................... 508
16-128 Offset 80h: EDMA_FERR - EDMA First Error Register ............................................ 509
16-129 Offset 84h: EDMA_NERR - EDMA Next Error Register ........................................... 511
16-130 Offset 88h: EDMA_EMASK - EDMA Error Mask Register ........................................ 513
16-131 Offset A0h: EDMA_SCICMD - EDMA SCI Command Register ................................. 514
16-132 Offset A4h: EDMA_SMICMD - EDMA SMI Command Register .................................. 515
16-133 Offset A8h: EDMA_SERRCMD - EDMA SERR Command Register ............................ 516
16-134 Offset ACh: EDMA_MCERRCMD - EDMA MCERR Command Register ......................... 517
16-135 Offset B0h: MSICR - MSI Control Register .......................................................... 518
16-136 Offset B4h: MSIAR - MSI Address Register ......................................................... 519
16-137 Offset B8h: MSIDR - MSI Data Register ............................................................. 520
16-138 Bus 0, Device 2, Function 0: Summary of PCI Express Port A Standard and
Enhanced PCI Configuration Registers ................................................................. 522
16-139 Bus 0, Device 3, Function 0: Summary of PCI Express Port A1 Standard and
Enhanced PCI Configuration Registers ................................................................. 524
16-140 Offset 00h: VID - Vendor Identification Register .................................................. 527
16-141 Offset 02h: DID - Device Identification Register .................................................. 527
16-142 Offset 02h: DID - Device Identification Register ................................................... 528
16-143 Offset 04h: PCICMD - PCI Command Register ..................................................... 528
16-144 Offset 06h: PCISTS - PCI Status Register ............................................................ 530
16-145 Offset 08h: RID - Revision Identification Register ................................................ 531
16-146 Offset 0Ah: SUBC - Sub-Class Code Register ...................................................... 532
16-147 Offset 0Bh: BCC - Base Class Code Register ....................................................... 532
16-148 Offset 0Ch: CLS - Cache Line Size Register ........................................................ 533
16-149 Offset 0Eh: HDR - Header Type Register ............................................................ 533
16-150 Offset 18h: PBUSN - Primary Bus Number Register ............................................. 534
16-151 Offset 19h: SBUSN - Secondary Bus Number Register .......................................... 534
16-152 Offset 1Ah: SUBUSN: Subordinate Bus Number Register ...................................... 535
16-153 Offset 1Ch: IOBASE - I/O Base Address Register ................................................. 535
16-154 Offset 1Dh: IOLIMIT - I/O Limit Address Register ................................................ 536
16-155 Offset 1Eh: SECSTS - Secondary Status Register ................................................ 536
16-156 Offset 20h: MBASE - Memory Base Address Register ........................................... 538
16-157 Offset 22h: MLIMIT - Memory Limit Address Register ........................................... 539
16-158 Offset 24h: PMBASE - Prefetchable Memory Base Address Register ........................ 540
16-159 Offset 26h: PMLIMIT - Prefetchable Memory Limit Address Register ....................... 540
16-160 Offset 28h: PMBASU - Prefetchable Memory Base Upper Address Register .............. 541
16-161 Offset 2Ch: PMLMTU - Prefetchable Memory Limit Upper Address Register .............. 541
16-162 Offset 34h: CAPPTR - Capabilities Pointer Register .............................................. 542
16-163 Offset 3Ch: INTRLINE - Interrupt Line Register ................................................... 542
16-164 Offset 3Dh: INTRPIN - Interrupt Pin Register ...................................................... 543
16-165 Offset 3Eh: BCTRL - Bridge Control Register ....................................................... 543
16-166 Offset 44h: VSCMD0 - Vendor Specific Command Byte 0 Register ......................... 545
16-167 Offset 45h: VSCMD1 - Vendor Specific Command Byte 1 Register ......................... 546
16-168 Offset 46h: VSSTS0 - Vendor Specific Status Byte 0 Register ................................ 547
16-169 Offset 47h: VSSTS1 - Vendor Specific Status Byte 1 Register ................................ 547
16-170 Offset 48h: VSCMD2 - Vendor Specific Command Byte 2 Register ......................... 548
16-171 Offset 50h: PMCAPID - Power Management Capabilities Structure Register ............. 548
16-172 Offset 51h: PMNPTR - Power Management Next Capabilities Pointer Register .......... 549
16-173 Offset 52h: PMCAPA - Power Management Capabilities Register ............................ 549
16-174 Offset 54h: PMCSR - Power Management Status and Control Register .................... 550
16-175 Offset 56h: PMCSRBSE - Power Management Status and Control Bridge Extensions
Register ........................................................................................................ 551
16-176 Offset 58h: MSICAPID - MSI Capabilities Structure Register ................................. 551
16-177 Offset 59h: MSINPTR - MSI Next Capabilities Pointer Register ............................... 552
Intel^® EP80579 Integrated Processor Product Line Datasheet
62
August 2009
Order Number: 320066-003US