EP80579 Datasheet, PDF (1867/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
49.5.7
UART
This section describes the Universal Asynchronous Receiver/Transmitter (UART) serial
port used for the two UARTs that are integrated into the Serial I/O unit and Watchdog
Timer (SIW). The UART can be controlled via programmed I/O. The basic programming
model is the same for both UARTs, with the only difference being the Logical Device
Number assigned to each. The serial port consists of a UART that supports all the
functions of a standard 16550 UART, including hardware flow control interface.
This section describes the electrical characteristics of the UART interface.
49.5.7.1
UART Signal List
For UART pin description refer to Table 48-16, “UART Signals” on page 1751.
49.5.7.2 UART DC Characteristics
Table 49-42. UART DC Input Characteristics
Symbol
Parameter
Conditions
Min Typical Max
Units
Notes
V_IH
Input voltage high
-
2.0
-
VCC33
+0.5
V
-
V_IL
Input voltage low
-
-0.5
-
0.8
V
-
Ι_leak
Input Leakage
Current
0<V_IN<Vcc3_3
-
-
10
µA
-
C_IN
Input-pin
capacitance
-
-
-
10
pf
1
Notes:
1.
Guaranteed by design. These values are typical values seen for this process, but not measured during
production testing
Table 49-43. UART DC Output Characteristics
Symbol
Parameter
Conditions
Min
Typical
Max
Units Notes
V_OH
Output voltage high l_out=-0.5mA 0.9VCC33
-
-
V
1
V_OL
Output voltage low
l_out=1.5mA
-
-
0.1VCC33
V
Ι_OH
Output current at
high voltage
V_OH>0.9VCC33
-0.5
-
-
mA
Ι_OL
Output current at
low voltage
V_OL<0.1VCC33
-
-
1.5
mA
Notes:
1.
VOH spec does not apply to signals that are open drain driver. Open drain signals must have an
external pull up resistor.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1867