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EP80579 Datasheet, PDF (1035/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line
Intel® EP80579 Integrated Processor
Table 26-54. Effect of Resets on Port-Routing Logic
Reset Event
Effect on Configure Flag
Suspend Well Reset
Core Well Reset
D3-to-D0 Reset
HCRESET
cleared (0)
no effect
no effect
cleared (0)
Effect on Port Owner Bits
set (1)
no effect
no effect
set (1)
26.12
USB 2.0 Legacy Keyboard Operation
CMI must support the possibility of a keyboard downstream from either a USB1 (low-
speed or full-speed) or a USB 2.0 (high-speed) port. See Section 25.12, “USB Legacy
Keyboard Operation” for the description of the legacy keyboard support.
The EHC provides the basic ability to generate SMIs on an interrupt event, along with
more sophisticated control of the generation of SMIs, as documented in Section
26.2.1.27, “Offset 68h: ULSEC - USB 2.0 Legacy Support Extended Capability
Register”.
26.13
Note:
USB 2.0 Based Debug Port
CMI supports the elimination of the legacy COM ports by providing the ability for new
debugger software to interact with devices on a USB 2.0 port.
High-level restrictions and features:
• Must be operational before USB 2.0 drivers are loaded.
— Must work even when the port is disabled.
— Must work even though non-configured port is default-routed to the classic
controller.
The Debug Port cannot be used to debug an issue that requires a classic USB device on
Port #0 using the UHCI drivers.
• Must allow normal system USB 2.0 traffic in a system that may only have one USB
port.
• Debug Port device (DPD) must be High-Speed capable and connect to a High-Speed
port on CMI systems.
• Debug Port FIFO must always make forward progress (a bad status on USB is
simply presented back to software).
The Debug Port FIFO is only given one USB access per microframe.
26.13.1
USB 2.0 Based Debug Port Overview
The Debug port facilitates OS and device driver debug. It allows the software to
communicate with an external console using a USB 2.0 connection. Because the
interface to this link does not go through the normal USB 2.0 stack, it allows
communication with the external console during cases where the OS is not loaded, the
USB 2.0 software is broken, or where the USB 2.0 software is being debugged.
Specific features of this implementation of a debug port are:
• Only works with an external USB 2.0 debug device (console)
August 2009
Order Number: 320066-003US
Intel® EP80579 Integrated Processor Product Line Datasheet
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