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EP80579 Datasheet, PDF (1373/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line
Intel® EP80579 Integrated Processor
37.5.6.5
counting down due to a previous descriptor. If hardware encounters a descriptor that
has RS set, but not IDE, it generates an interrupt immediately after writing back the
descriptor and the interrupt delay timer is cleared.
Four bits are reserved to provide transmit status, although only one is currently
assigned for this specific descriptor type. The status word will only be written back to
host memory in cases where the RS is set in the command. DD indicates that the
descriptor is done and is written back after the descriptor has been processed.
TCP/IP Data Descriptor Format
The TCP/IP data descriptor is the companion to the TCP/IP context descriptor described
in the previous section. This descriptor type provides similar functionality to the legacy
mode descriptor but also integrates the checksum off loading and TCP Segmentation
features.
To select the TCP/IP data transmit descriptor format, shown below in Figure 37-24.
Figure 37-24.TCP/IP Data Transmit Descriptor Layout (TDESC) - (Type = 0001)
0
Address[63:0]
8
VLAN
POPTS
Rsvd DSTATUS DCMD
DTYP
DTALEN
63
48 47 40 39 36 35 32 31 24 23 20 19
0
The first QWORD of this descriptor type contains the address of a data buffer in host
memory which contains a portion of a transmit packet. The second QWORD of this
descriptor contains information about the data pointed to by this descriptor as well as
descriptor processing options.
Setting TDESC.DEXT to 1 and the descriptor type (TDESC.DTYP) field to “0001”
identifies this descriptor as a TCP/IP data descriptor.
The data length field (TDESC.DTALEN) is the total length of the data pointed to by this
descriptor, in bytes. For data descriptors not associated with a TCP Segmentation
operation (TDESC.TSE not set), the descriptor lengths are subject to the same
restrictions specified for legacy descriptors (the sum of the lengths of the data
descriptors comprising a single packet must be at least 80 bytes less than the allocated
size of the transmit FIFO). In addition, although a buffer as short as one byte is
allowed, the total length of the packet, before padding and CRC insertion, must be at
least 17 bytes.
The command field (TDESC.DCMD) provides options that control the checksum off-
loading TCP Segmentation features, along with some of the generic descriptor
processing features. Figure 37-25 shows the bit definitions for the DCMD field.
Figure 37-25.TCP/IP Data Transmit Descriptor Command Field (TDESC.DCMD)
7
6
5
4
3
IDE
VLE
DEXT Rsvd
RS
IDE: Interrupt Delay Enable
2
1
0
TSE
IFCS
EOP
VLE: VLAN Enable
DEXT: Descriptor Extension (Must be 1 for this descriptor type)
August 2009
Order Number: 320066-003US
Intel® EP80579 Integrated Processor Product Line Datasheet
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