EP80579 Datasheet, PDF (778/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
20.3
DMA Channel Arbitration
The IICH DMA controller consists of two logical channel groups; channels 0–3 and
channels 4–7. Each group may be in either fixed or rotate mode as described in detail
below.
The mode of operation for each controller is determined by the DMA Command
register; address 08h for channels 0–3 and address D0h for channels 4–7. Since
channels 0–3 are cascaded onto channel 4, any request on channel 0–3 appears as a
request on channel 4.
The DMA controller stops rotating when an NMI is pending.
In fixed mode, the lowest numbered channel in a channel group receives highest
priority. Therefore, channel 0 is the highest priority device of channels 0–3, and channel
4 is the highest priority device of channels 4–7. When both channels are programmed
in fixed mode, channel 0 has highest priority and channel 7 the lowest.
In rotating mode, the lowest numbered channel starts out with highest priority. When it
is serviced, the next numbered channel receives highest priority and the previous
channel receives lowest priority. For example, if channel 0 has highest priority and is
requesting, it wins arbitration, then is the lowest priority channel until channels 1, 2,
and 3 have been serviced.
Due to the nature of channel 0–3 being cascaded onto channel 4, rotating mode adds
some peculiarities to the arbitration scheme. Table 20-18 lists arbitration winners
assuming all channels ares requesting.
Table 20-18. DMA Channel Priority
Current
0
1
2
3
5
6
7
Both Fixed
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
Lower Fixed, Upper Rotating
5, 6, 7, 0, 1, 2, 3
5, 6, 7, 0, 1, 2, 3
5, 6, 7, 0, 1, 2, 3
5, 6, 7, 0, 1, 2, 3
6, 7, 0, 1, 2, 3, 5
7, 0, 1, 2, 3, 5, 6
0, 1, 2, 3, 5, 6, 7
Lower Rotating, Upper Fixed
1, 2, 3, 0, 5, 6, 7
2, 3, 0, 1, 5, 6, 7
3, 0, 1, 2, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
0, 1, 2, 3, 5, 6, 7
Both Rotating
5, 6, 7, 1, 2, 3, 0
5, 6, 7, 2, 3, 0, 1
5, 6, 7, 3, 0, 1, 2
5, 6, 7, 0, 1, 2, 3
6, 7, 0, 1, 2, 3, 5
7, 0, 1, 2, 3, 5, 6
0, 1, 2, 3, 5, 6, 7
Intel^® EP80579 Integrated Processor Product Line Datasheet
778
August 2009
Order Number: 320066-003US