EP80579 Datasheet, PDF (1313/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
35.11.1.16 Offset DEh: PMCAP – Power Management Capability Register
Table 35-136.Offset DEh: PMCAP: Power Management Capability Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: M:7:0
Offset Start: DEh
Offset End: DFh
Size: 16 bit
Default: 0023h
Power Well: Core
Bit Range Bit Acronym
Bit Description
15 : 11
10
09
08 : 06
05
04
03
02 : 00
PME_SPT
D2_SPT
D1_SPT
AUX_CRNT
DSI
RV
PME_CLI
VER
PME# Support
D2 Support
D1 Support
Aux Current
Device Specific Initialization
Reserved
PME Clock
Version
Sticky
Bit Reset
Value
0h
0h
0h
0h
1
0h
0h
011b
Bit Access
RO
RO
RO
RO
RO
RV
RO
RO
35.11.1.17 Offset E0h: PMCS – Power Management Control and Status Register
Table 35-137.Offset E0h: PMCS: Power Management Control and Status Register
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: M:7:0
Offset Start: E0h
Offset End: E1h
Size: 16 bit
Default: 0000h
Power Well: Core
Bit Range Bit Acronym
Bit Description
15
14 : 13
12 : 09
08
07 : 04
03
02
01 : 00
PME_STATUS PME Status (sticky)
DATA_SCALE Data Scale
DATA_SEL Data Select
PME_EN PME Enable (sticky)
RV
Reserved
NSR
No Soft Reset
RV
Reserved
PS
Power State
Sticky
Bit Reset
Value
0h
00b
0000b
0h
0000b
0h
0h
00b
Bit Access
RO
RO
RO
RO
RO
RO
RO
RW
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1313