EP80579 Datasheet, PDF (779/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
20.4
Special Cases in Address/Count
20.4.1
Address Overrun/Underrun
Whenever the DMA is operating, the addresses do not increment or decrement through
the High Page and Low Page registers. Therefore, if a 24-bit address is 01FFFFh and
increments, the next address is 010000h, not 020000h. Similarly, if a 24-bit address is
020000h and decrements, the next address is 02FFFFh, not 01FFFFh.
However, when the DMA is operating in 16-bit mode, the addresses do not increment or
decrement through the High Page and Low Page registers but the page boundary is
now 128 Kbyte. Therefore, if a 24-bit address is 01FFFEh and increments, the next
address is 000000h, not 010000h. Similarly, if a 24-bit address is 020000h and
decrements, the next address is 03FFFEh, not 02FFFEh.
20.4.2 16-Bit Channels
For 16-bit channels, the DMA controller addressing is different than for 8-bit channels.
The DMA controller shifts the lower 16 bits of address left 1 bit and shifts in a ‘0’, as
shown in Table 20-19. The count register is also redefined to represent words instead
of bytes.
Table 20-19. Address Shifting in 16-bit DMA Transfers
Page
00
01
01
00
00
Register
High Byte
01
FE
FF
FE
FF
Low Byte
01
85
FF
85
FF
Address on 8 bit channels
(hex)
00.01.01
01.FE.85
01.FF.FF
00.FE.85
00.FF.FF
Address on 16 bit channels
(hex)
00.02.02
01.FD.0A
01.FF.FE
01.FD.0A
01.FF.FE
20.4.3 Autoinitialize
By programming a bit in the DMA Channel Mode Register, a channel may be set up as
an autoinitialize channel. When a channel undergoes autoinitialization, the original
values of the Current Page, Current Address and Current Byte/Word Count Registers
are automatically restored from the Base Page, Address, and Byte/Word Count
Registers of that channel following TC. The Base Registers are loaded simultaneously
with the Current Registers by the microprocessor when the DMA channel is
programmed and remain unchanged throughout the DMA service. The mask bit is not
set when the channel is in autoinitialize. Following autoinitialize, the channel is ready to
perform another DMA service, without processor intervention, as soon as a valid DREQ
is detected.
20.4.4
Software Commands
There are three additional special software commands that the DMA controller can
execute. The three software commands are:
• Clear Byte Pointer Flip-Flop
• Master Clear
• Clear Mask Register
They are independent of any specific bit pattern on the data bus.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
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