EP80579 Datasheet, PDF (458/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
Table 16-69. Offset 4Ch: NSI_NERR - NSI Next Error Register (Sheet 2 of 3)
Description:
View: PCI
BAR: Configuration
Bus:Device:Function: 0:0:1
Offset Start: 4Ch
Offset End: 4Fh
Size: 32 bit
Default: 00000000h
Power Well: Core
Bit Range
18 : 16
15
14
13
12
11
10
09
08
07
06
05
04 : 03
Bit Acronym
Bit Description
Sticky
Reserved Reserved
RTTO
Replay Timer Timeout Status: The replay timer counts
time since the last ACK or NAK DLLP was received. When
the timer expires, this bit is set. This bit is sticky through
system reset.
Y
0 = Cleared by writing a ‘1’ to the bit location.
1 = Replay Timer timeout detected.
Reserved Reserved
RNRO
REPLAY_NUM Rollover Status: A 2-bit counter counts
the number of times the retry buffer has been
retransmitted. When this counter rolls over, this bit is set.
This bit is sticky through system reset.
Y
0 = Cleared by writing a ‘1’ to the bit location.
1 = REPLAY_NUM rollover detected.
BDLLP
Bad DLLP Status: This bit is set when the calculated DLLP
CRC is not equal to the received value. Also included are
8b/10b errors within the TLP including wrong disparity. An
invalid sequence number also sets this bit. This bit is sticky _Y
through system reset.
0 = Cleared by writing a ‘1’ to the bit location.
1= Bad DLLP detected.
BTLP
Bad TLP Status:
0 = The calculated TLP CRC is equal to the received value.
1 = The calculated TLP CRC is not equal to the received
Y
value. Also included are 8b/10b errors within the TLP
including wrong disparity, and invalid sequence numbers.
Reserved Reserved
RCVRE
Receiver Error Status: Data is delivered over PCI
Express via packets built out of 8b/10b symbols. This error
is set for problems with the packet framing around these
symbols or with symbols received outside of recognized
Y
packets. This bit is sticky through system reset.
0 = Cleared by writing a ‘1’ to the bit location.
1 = Receiver Error detected.
Reserved Reserved
FEMR
Fatal Error Message Received:
0 = No Fatal Error Message Received over the NSI link.
1 = Fatal Error Message Received over the NSI link.
NEMR
Non-Fatal Error Message Received: Non-Fatal Error
Message Received over the NSI link.
0 = No Non-Fatal Error Message Received over the NSI
link.
1 = Non-Fatal Error Message Received over the NSI link.
CEMR
Correctable Error Message Received: Correctable Error
Message Received over the NSI link.
0 = No Correctable Error Message Received over the NSI
link.
1 = Correctable Error Message Received over the NSI link.
Reserved Reserved
Bit Reset
Value
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
0b
Bit Access
RWC
RWC
RWC
RWC
RWC
RWC
RWC
RWC
Intel^® EP80579 Integrated Processor Product Line Datasheet
458
August 2009
Order Number: 320066-003US