EP80579 Datasheet, PDF (1561/1916 Pages) Intel Corporation – Intel® EP80579 Integrated Processor Product Line

Intel^® EP80579 Integrated Processor
38.4
Note:
Register Summary
Writes to unused address space have no affect. Reads from unused address space may
return indeterminate data. Neither reads nor writes cause detrimental effects on device
operation unless specifically documented. Reserved bits within registers must be
written with their reset value unless otherwise stated.
For more information on the conventions the following register summaries adopt, see
Section 7.1, “Overview of Register Descriptions and Summaries” on page 183.
Any programming order dependencies on configuration write values must be handled
by the OS.
The Global Configuration Unit registers materialize in the PCI space.
Table 38-1. Bus M, Device 3, Function 0: Summary of GCU Registers Mapped Through
CSRBAR Memory BAR
Offset Start Offset End
Register ID - Description
Default
Value
00000010h
00000014h
00000018h
00000020h
00000024h
00000044h
00000050h
00000054h
00000060h
00000064h
00000068h
00000028h
00000013h
00000017h
0000001Bh
00000023h
00000027h
00000047h
00000053h
00000057h
00000063h
00000067h
0000006Bh
0000002Bh
“Offset 0x00000010h: MDIO_STATUS - MDIO Status Register” on page 1562
00000000h
“Offset 0x00000014h: MDIO_COMMAND - MDIO Command Register” on
page 1562
00000000h
“Offset 0x00000018h: MDIO_DRIVE - MDIO Drive Register” on page 1563
03030107h
“Offset 0x00000020h: MDC_DRIVE - MDC Drive Register” on page 1563
0303030Fh
“Offset 0x00000024h: GCU_GBE_RC_CTRL - GCU GbE RCOMP Control Register”
on page 1564
0031F31Fh
“Offset 0x00000044h: GCU_GBE_RC_STAT - GCU GbE RCOMP Status Register” on
page 1564
00000000h
“Offset 0x00000050h: GCU_LEB_RC_STAT - GCU Local Expansion Bus RCOMP
Status Register” on page 1565
63000300h
“Offset 0x00000054h: GCU_LEB_RC_CTRL - GCU Local Expansion Bus RCOMP
Control Register” on page 1566
000030F301h
“Offset 0x00000060h: SSP_DRIVE - SSP Drive Register” on page 1566
02000200h
“Offset 0x00000064h: TDM_DRIVE_3 - TDM Drive Register for TDM ports 3” on
page 1567
02000200h
“Offset 0x00000068h: TDM_DRIVE_12 - TDM Drive Register for TDM ports 1 & 2”
on page 1567
02000200h
“Offset 0x00000028h: CAN_DRIVE - CAN Drive Register” on page 1568
02000200h
Table 38-2. Register-Table Legend
Attribute
RV
RO
RW
WO
RS
RC
WC
Legend
Reserved
Read Only
Read/Write
Write Only
Set automatically when read
Cleared automatically when read
Write to clear. See individual bit description for more details.
August 2009
Order Number: 320066-003US
Intel^® EP80579 Integrated Processor Product Line Datasheet
1561