K60P100M100SF2RM Datasheet, PDF (999/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

39.4.8 Combine Mode
Chapter 39 FlexTimer (FTM)
The combine mode is selected when (FTMEN = 1), (QUADEN = 0), (DECAPEN = 0),
(COMBINE = 1), and (CPWMS = 0).
In combine mode, the channel (n) (an even channel) and channel (n+1) (the adjacent odd
channel) are combined to generate a PWM signal in the channel (n) output.
In the combine mode, the PWM period is determined by (MOD − CNTIN + 0x0001) and
the PWM pulse width (duty cycle) is determined by (|C(n+1)V − C(n)V|).
The CHnF bit is set and the channel (n) interrupt is generated (if CHnIE = 1) at the
channel (n) match (FTM counter = C(n)V). The CH(n+1)F bit is set and the channel (n
+1) interrupt is generated (if CH(n+1)IE = 1) at the channel (n+1) match (FTM counter =
C(n+1)V).
If (ELSnB:ELSnA = 1:0), then the channel (n) output is forced low at the beginning of
the period (FTM counter = CNTIN) and at the channel (n+1) match (FTM counter = C(n
+1)V). It is forced high at the channel (n) match (FTM counter = C(n)V)(see the
following figure).
If (ELSnB:ELSnA = X:1), then the channel (n) output is forced high at the beginning of
the period (FTM counter = CNTIN) and at the channel (n+1) match (FTM counter = C(n
+1)V). It is forced low at the channel (n) match (FTM counter = C(n)V)(see the
following figure).
In combine mode, the ELS(n+1)B and ELS(n+1)A bits are not used in the generation of
the channels (n) and (n+1) output. However, if (ELSnB:ELSnA = 0:0) then the channel
(n) output is not controlled by FTM, and if (ELS(n+1)B:ELS(n+1)A = 0:0) then the
channel (n+1) output is not controlled by FTM.
channel (n+1) match
FTM counter
channel (n) match
channel (n) output
with ELSnB:ELSnA = 1:0
channel (n) output
with ELSnB:ELSnA = X:1
Figure 39-187. Combine Mode
The following figures illustrate the PWM signals generation using combine mode.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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