K60P100M100SF2RM Datasheet, PDF (820/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Register Definition
34.3.12 ADC plus-side general calibration value register
(ADCx_CLPS)
For more information, refer to CLPD register description.
Addresses: ADC0_CLPS is 4003_B000h base + 38h offset = 4003_B038h
ADC1_CLPS is 400B_B000h base + 38h offset = 400B_B038h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
CLPS
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0
ADCx_CLPS field descriptions
Field
31–6
Reserved
5–0
CLPS
Description
This read-only field is reserved and always has the value zero.
Calibration value
34.3.13 ADC plus-side general calibration value register
(ADCx_CLP4)
For more information, refer to CLPD register description.
Addresses: ADC0_CLP4 is 4003_B000h base + 3Ch offset = 4003_B03Ch
ADC1_CLP4 is 400B_B000h base + 3Ch offset = 400B_B03Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
CLP4
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0
ADCx_CLP4 field descriptions
Field
31–10
Reserved
9–0
CLP4
Description
This read-only field is reserved and always has the value zero.
Calibration value
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
820
Freescale Semiconductor, Inc.