K60P100M100SF2RM Datasheet, PDF (1166/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
ENET_ATCR field descriptions (continued)
Field
8
Reserved
7
PINPER
Description
This read-only field is reserved and always has the value zero.
Enables event signal output assertion on period event.
NOTE: Not all devices contain the event signal output. See the Chip Configuration details.
6–5
Reserved
4
PEREN
3
OFFRST
2
OFFEN
1
Reserved
0
EN
0 Disable.
1 Enable.
This read-only field is reserved and always has the value zero.
Enable periodical event
0 Disable.
1 _{A period event interrupt can be generated (EIR[TS_TIMER]) and the event signal output is asserted}
when the timer wraps around according to the periodic setting ATPER. Set the timer period value
before setting this bit.
NOTE: Not all devices contain the event signal output. See the Chip Configuration details.
Reset timer on offset event
0 The timer is not affected and no action occurs (besides clearing OFFEN) when the offset is reached.
1 If OFFEN is set, the timer resets to zero when the offset setting is reached. The offset event does not
cause a timer interrupt.
Enable one-shot offset event
0 Disable.
1 The timer can be reset to zero when the given offset time is reached (offset event). The bit is cleared
when the offset event is reached, so no further event occurs until the bit is set again. Set the timer
offset value before setting this bit.
This read-only field is reserved and always has the value zero.
Enable timer
0 The timer stops at the current value.
1 The timer starts incrementing.
44.3.34 Timer Value Register (ENET_ATVR)
Address: ENET_ATVR is 400C_0000h base + 404h offset = 400C_0404h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
ATIME
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
1166
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.