K60P100M100SF2RM Datasheet, PDF (758/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional description
CRC_CTRL field descriptions (continued)
Field
24
TCRC
23–0
Reserved
Width of CRC protocol.
Description
0 16-bit CRC protocol.
1 32-bit CRC protocol.
This read-only field is reserved and always has the value zero.
31.3 Functional description
31.3.1 CRC initialization/re-initialization
To enable the CRC calculation, the user must program the WAS, POLYNOMIAL, and
necessary parameters for transpose and CRC result inversion in the applicable registers.
Asserting the CTRL[WAS] bit enables the programming of the seed value into the CRC
data register.
After a completed CRC calculation, re-asserting the CTRL[WAS] bit and programming a
seed (whether the value is new or a previously used seed value) re-initialize the CRC
module for a new CRC computation. All other parameters must be set before
programming the seed value and subsequent data values.
31.3.2 CRC calculations
In 16-bit and 32-bit CRC modes, data values can be programmed 8 bits, 16 bits, or 32 bits
at a time, provided all bytes are contiguous. Non-contiguous bytes can lead to an
incorrect CRC computation.
31.3.2.1 16-bit CRC
Compute a 16-bit CRC with the following steps:
1. Clear the CTRL[TCRC] bit to enable 16-bit CRC mode.
2. Program the transpose and complement options in the CTRL register as required for
the CRC calculation. See Transpose feature and CRC result complement for details.
3. Write a 16-bit polynomial to the GPOLY[LOW] field. The GPOLY[HIGH] field is
not usable in 16-bit CRC mode.
4. Set the CTRL[WAS] bit to program the seed value.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
758
Freescale Semiconductor, Inc.