K60P100M100SF2RM Datasheet, PDF (1015/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

system clock
write 1 to SWSYNC bit
Chapter 39 FlexTimer (FTM)
SWSYNC bit
software trigger event
MOD register is updated
Figure 39-211. MOD Synchronization with (SYNCMODE = 0), (PWMSYNC = 0), (REINIT =
1), and (Software Trigger Was Used)
system clock
write 1 to TRIG0 bit
TRIG0 bit
trigger 0 event
MOD register is updated
Figure 39-212. MOD Synchronization with (SYNCMODE = 0), (HWTRIGMODE = 0),
(PWMSYNC = 0), (REINIT = 1), and (a Hardware Trigger Was Used)
If (SYNCMODE = 0) and (PWMSYNC = 1) then this synchronization is made on the
next selected loading point after the software trigger event takes place. The SWSYNC bit
is cleared on the next selected loading point:
system clock
write 1 to SWSYNC bit
SWSYNC bit
software trigger event
selected loading point
MOD register is updated
Figure 39-213. MOD Synchronization with (SYNCMODE = 0) and (PWMSYNC = 1)
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1015