English
Language : 

K60P100M100SF2RM Datasheet, PDF (1657/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Chapter 52 Secured digital host controller (SDHC)
2. Invalid descriptor error: For such errors, it is recommended to retrieve the transfer
context, reset for the data part and re-create the descriptor chain from the invalid
descriptor and issue a new transfer. As the data to transfer now may be less than the
previous setting, the data length configured in the new descriptor chain should match
the new value.
3. Data-length mismatch error: It is similar to recover from this error. The host driver
polls relating registers to retrieve the transfer context, apply a reset for the data part,
configure a new descriptor chain, and make another transfer if there is data left. Like
the previous scenario of the invalid descriptor error, the data length must match the
new transfer.
52.6.3.5.4 Auto CMD12 error
After the last block of the multi block transfer is sent or received, and the
XFERTYP[AC12EN] bit is set when the data transfer is initiated by the data command,
the SDHC automatically sends a CMD12 to the card to stop the transfer. When errors
with this command occur, it is recommended to the driver to deal with the situations in
the following manner:
1. Auto CMD12 response time-out. It is not certain whether the command is accepted
by the card or not. The driver should clear the IRQSTAT[AC12E] bits and re-send
the CMD12 until it is accepted by the card.
2. Auto CMD12 response CRC error. Since card responds to the CMD12, the card will
abort the transfer. The driver may ignore the error and clear the IRQSTAT[AC12E]
bit.
3. Auto CMD12 conflict error or not sent. The command is not sent, so the driver shall
send a CMD12 manually.
52.6.3.6 Card interrupt
The external cards can inform the host controller by means of some special signals. For
the SDIO card, it can be the low level on the DAT[1] line during some special period. For
the CE-ATA card, it can be a pulse on the CMD line to inform the host controller that the
command and its response is finished, and it is possible that some additional external
interrupt behaviors are defined. The SDHC only monitors the DAT[1] line and supports
the SDIO interrupt.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1657