K60P100M100SF2RM Datasheet, PDF (85/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Master Modules
Slave Modules
Chapter 3 Chip Configuration
ARM core
code bus
ARM core
system bus
Crossbar Switch
Flash
controller
DMA
EzPort
Ethernet
USB
SDHC
SRAM
backdoor
Peripheral
bridge 0
Peripheral
bridge 1
GPIO
controller
FlexBus
Figure 3-10. Crossbar switch configuration
Table 3-15. Reference links to related information
Topic
Full description
Related module
Crossbar switch
Reference
Crossbar Switch
System memory map
System memory map
Clocking
Clock Distribution
Memory protection
MPU
Crossbar switch master ARM Cortex-M4 core
MPU
ARM Cortex-M4 core
Crossbar switch master
DMA controller
DMA controller
Crossbar switch master
EzPort
EzPort
Crossbar switch master
Ethernet
Ethernet
Crossbar switch master
USB FS/LS
USB FS/LS
Crossbar switch master
SDHC
SDHC
Crossbar switch slave
Flash
Flash
Crossbar switch slave
SRAM backdoor
SRAM backdoor
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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