K60P100M100SF2RM Datasheet, PDF (1216/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
Table 44-85. Receive Buffer Descriptor Field Definitions (continued)
Word
Offset + 0
Offset + 0
Offset + 0
Offset + 0
Offset + 0
Offset + 0
Offset + 0
Offset + 2
0ffset + 4
Offset + 6
Offset + 8
Offset + 8
Offset + 8
Offset + 8
Offset + 8
Offset + 8
Offset + 8
Field
6
MC
5
LG
4
NO
3
2
CR
1
OV
0
TR
15–0
Data Length
15–0
A[31:16]
15–0
A[15:0]
15
ME
14–11
10
PE
9
CE
8
UC
7
INT
6–0
Description
Set if the DA is multicast and not BC.
Rx frame length violation. Written by the MAC. A frame length greater than
RCR[MAX_FL] was recognized. This bit is valid only if the L bit is set. The
receive data is not altered in any way unless the length exceeds TRUNC_FL
bytes.
Receive non-octet aligned frame. Written by the MAC. A frame that contained a
number of bits not divisible by 8 was received, and the CRC check that occurred
at the preceding byte boundary generated an error or a PHY error occurred.
This bit is valid only if the L bit is set. If this bit is set, the CR bit is not set.
Reserved, must be cleared.
Receive CRC or frame error. Written by the MAC. This frame contains a PHY or
CRC error and is an integral number of octets in length. This bit is valid only if
the L bit is set.
Overrun. Written by the MAC. A receive FIFO overrun occurred during frame
reception. If this bit is set, the other status bits, M, LG, NO, CR, and CL lose
their normal meaning and are zero. This bit is valid only if the L bit is set.
Set if the receive frame is truncated (frame length >TRUNC_FL). If the TR bit is
set, the frame must be discarded and the other error bits must be ignored as
they may be incorrect.
Data length. Written by the MAC. Data length is the number of octets written by
the MAC into this BD's data buffer if L is cleared (the value is equal to EMRBR),
or the length of the frame including CRC if L is set. It is written by the MAC once
as the BD is closed.
RX data buffer pointer, bits [31:16]¹
RX data buffer pointer, bits [15:0]
MAC error. This bit is written by the uDMA. This bit means that the frame stored
in the system memory was received with an error (typically, a receive FIFO
overflow). This bit is only valid when the L bit is set.
Reserved, must be cleared.
PHY Error. This bit is written by the uDMA. Set to "1"when the frame was
received with an Error character on the PHY interface. The frame is invalid. This
bit is valid only when the L bit is set.
Collision. This bit is written by the uDMA. Set when the frame was received with
a collision detected during reception. The frame is invalid and sent to the user
application. This bit is valid only when the L bit is set.
Unicast. This bit is written by the uDMA. This bit means that the frame is unicast.
This bit is valid regardless of if the L bit is set.
Generate RXB/RXF interrupt. This bit is set by the user. This bit indicates that
the uDMA is to generate an interrupt on the dma_int_rxb / dma_int_rxfevent.
Reserved, must be cleared.
Table continues on the next page...
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.