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K60P100M100SF2RM Datasheet, PDF (637/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Chapter 28 Flash Memory Module (FTFL)
28.34.5 Flash Common Command Object Registers
(FTFL_FCCOBn)
The FCCOB register group provides 12 bytes for command codes and parameters. The
individual bytes within the set append a 0-B hex identifier to the FCCOB register name:
FCCOB0, FCCOB1, ..., FCCOBB.
Addresses: 4002_0000h base + 4h offset + (1d × n), where n = 0d to 11d
Bit
7
6
5
4
3
2
1
0
Read
Write
CCOBn
Reset
0
0
0
0
0
0
0
0
FTFL_FCCOBn field descriptions
Field
7–0
CCOBn
Description
The FCCOB register provides a command code and relevant parameters to the memory controller. The
individual registers that compose the FCCOB data set can be written in any order, but you must provide
all needed values, which vary from command to command. First, set up all required FCCOB fields and
then initiate the command’s execution by writing a 1 to the FSTAT[CCIF] bit. This clears the CCIF bit,
which locks all FCCOB parameter fields and they cannot be changed by the user until the command
completes (CCIF returns to 1). No command buffering or queueing is provided; the next command can be
loaded only after the current command completes.
Some commands return information to the FCCOB registers. Any values returned to FCCOB are available
for reading after the FSTAT[CCIF] flag returns to 1 by the memory controller.
The following table shows a generic FTFL command format. The first FCCOB register, FCCOB0, always
contains the command code. This 8-bit value defines the command to be executed. The command code
is followed by the parameters required for this specific FTFL command, typically an address and/or data
values.
NOTE: The command parameter table is written in terms of FCCOB Number (which is equivalent to the
byte number). This number is a reference to the FCCOB register name and is not the register
address.
FCCOB Number
0
1
2
3
4
5
6
7
8
9
Typical Command Parameter Contents [7:0]
FCMD (a code that defines the FTFL command)
Flash address [23:16]
Flash address [15:8]
Flash address [7:0]
Data Byte 0
Data Byte 1
Data Byte 2
Data Byte 3
Data Byte 4
Data Byte 5
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
637