K60P100M100SF2RM Datasheet, PDF (951/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
4
CAPTEST
3
PWMSYNC
2
WPDIS
1
INIT
0
FTMEN
Chapter 39 FlexTimer (FTM)
FTMx_MODE field descriptions (continued)
Capture Test Mode Enable
Description
Enables the capture test mode.
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 Capture test mode is disabled.
1 Capture test mode is enabled.
PWM Synchronization Mode
Selects which triggers can be used by MOD, CnV, OUTMASK, and FTM counter synchronization (PWM
Synchronization). The PWMSYNC bit configures the synchronization when SYNCMODE is zero.
0 No restrictions. Software and hardware triggers can be used by MOD, CnV, OUTMASK, and FTM
counter synchronization.
1 Software trigger can only be used by MOD and CnV synchronization, and hardware triggers can only
be used by OUTMASK and FTM counter synchronization.
Write Protection Disable
When write protection is enabled (WPDIS = 0), write protected bits can not be written. When write
protection is disabled (WPDIS = 1), write protected bits can be written. The WPDIS bit is the negation of
the WPEN bit. WPDIS is cleared when 1 is written to WPEN. WPDIS is set when WPEN bit is read as a 1
and then 1 is written to WPDIS. Writing 0 to WPDIS has no effect.
0 Write protection is enabled.
1 Write protection is disabled.
Initialize the Channels Output
When a 1 is written to INIT bit the channels output is initialized according to the state of their
corresponding bit in the OUTINIT register. Writing a 0 to INIT bit has no effect.
The INIT bit is always read as 0.
FTM Enable
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 Only the TPM-compatible registers (first set of registers) can be used without any restriction. Do not
use the FTM-specific registers.
1 All registers including the FTM-specific registers (second set of registers) are available for use with no
restrictions.
39.3.11 Synchronization (FTMx_SYNC)
This register configures the PWM synchronization.
A synchronization event can perform the synchronized update of MOD, CV, and
OUTMASK registers with the value of their write buffer and the FTM counter
initialization.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
951