K60P100M100SF2RM Datasheet, PDF (1675/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 53
Integrated interchip sound (I2S)
53.1 Introduction
NOTE
For the chip-specific implementation details of this module's
instances see the chip configuration chapter.
This section discusses the architecture, the programming model, the operating modes, and
initialization of integrated interchip sound (I²S) module.
The I²S is a full-duplex, serial port that allows the chip to communicate with a variety of
serial devices. Such serial devices are:
• Standard codecs
• Digital signal processors (DSPs)
• Microprocessors
• Peripherals
• Audio codecs that implement the inter-IC sound bus (I²S) and the Intel^® AC97
standards
The I²S module typically transfers samples in a periodic manner. The I²S consists of
independent transmitter and receiver sections with independent clock generation and
frame synchronization.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1675