K60P100M100SF2RM Datasheet, PDF (952/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map and Register Definition
NOTE
The software trigger (SWSYNC bit) and hardware triggers
(TRIG0, TRIG1, and TRIG2 bits) have a potential conflict if
used together when SYNCMODE = 0. It is recommended using
only hardware or software triggers but not both at the same
time, otherwise unpredictable behavior is likely to happen.
The selection of the loading point (CNTMAX and CNTMIN
bits) is intended to provide the update of MOD, CNTIN, and
CnV registers across all enabled channels simultaneously. The
use of the loading point selection together with SYNCMODE =
0 and hardware trigger selection (TRIG0, TRIG1, or TRIG2
bits) is likely to result in unpredictable behavior.
The synchronization event selection also depends on the
PWMSYNC (MODE register) and SYNCMODE (SYNCONF
register) bits. See PWM Synchronization.
Addresses: FTM0_SYNC is 4003_8000h base + 58h offset = 4003_8058h
FTM1_SYNC is 4003_9000h base + 58h offset = 4003_9058h
FTM2_SYNC is 400B_8000h base + 58h offset = 400B_8058h
Bit 31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
W
Reset 0
Field
31–8
Reserved
7
SWSYNC
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FTMx_SYNC field descriptions
Description
This read-only field is reserved and always has the value zero.
PWM Synchronization Software Trigger
Selects the software trigger as the PWM synchronization trigger. The software trigger happens when a 1
is written to SWSYNC bit.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
952
Freescale Semiconductor, Inc.