K60P100M100SF2RM Datasheet, PDF (1665/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 52 Secured digital host controller (SDHC)
stop at block gap when card block counter is equal to this value. And need to
configure MMCBOOT[DTOCVACK] bit to select the ack timeout value according
to the sd clk frequence.
12. Software need to clear IRQSTAT[TC] and IRQSTAT[BGE] bit. And software need
to clear PROCTL[SABGREQ], and set PROCTL[CREQ] to 1 to resume the data
transfer. Host will transfer the VALUE2 and VAULE3 data to the destination that is
set by descriptor.
13. Software need to polling IRQSTAT[BGE] bit to determine if the fast boot is over.
Note
1. When ADMA boot flow is started, for SDHC, it is like a
normal ADMA read operation. So setting ADMA2
descriptor as the normal ADMA2 transfer.
2. Need a few words length memory to keep descriptor.
3. For the 1~2 words data in second descriptor setting, it is the
useful data, so software need to deal the data due to the
application case.
52.6.7 Commands for MMC/SD/SDIO/CE-ATA
The following table lists the commands for the MMC/SD/SDIO/CE-ATA cards.
Refer to the corresponding specifications for more details about the command
information.
There are four kinds of commands defined to control the Multimediacard:
1. broadcast commands (bc), no response.
2. broadcast commands with response (bcr), response from all cards simultaneously.
3. addressed (point-to-point) commands (ac), no data transfer on the DAT.
4. addressed (point-to-point) data transfer commands (adtc).
CMD INDEX
CMD0
Table 52-37. Commands for MMC/SD/SDIO/CE-ATA cards
Type
bc
Argument
[31:0] stuff bits
Resp
-
Abbreviation
GO_IDLE_STATE
Description
Resets all MMC and SD
memory cards to idle state.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1665