K60P100M100SF2RM Datasheet, PDF (1153/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
15–0
TYPE
Chapter 44 10/100-Mbps Ethernet MAC (ENET)
ENET_PAUR field descriptions (continued)
Type field in PAUSE frames.
Description
These bits have a constant value of 0x8808.
44.3.13 Opcode/Pause Duration Register (ENET_OPD)
OPD is read/write accessible. This register contains the 16-bit opcode and 16-bit pause
duration fields used in transmission of a PAUSE frame. The opcode field is a constant
value, 0x0001. When another node detects a PAUSE frame, that node pauses
transmission for the duration specified in the pause duration field. The lower 16 bits of
this register are not reset and you must initialize them.
Address: ENET_OPD is 400C_0000h base + ECh offset = 400C_00ECh
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
OPCODE
W
PAUSE_DUR
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ENET_OPD field descriptions
Field
31–16
OPCODE
15–0
PAUSE_DUR
Opcode field in PAUSE frames
Description
These bits have a constant value of 0x0001.
Pause duration
Pause duration field used in PAUSE frames.
44.3.14 Descriptor Individual Upper Address Register (ENET_IAUR)
IAUR contains the upper 32 bits of the 64-bit individual address hash table. The address
recognition process uses this table to check for a possible match with the destination
address (DA) field of receive frames with an individual DA. This register is not reset and
you must initialize it.
Address: ENET_IAUR is 400C_0000h base + 118h offset = 400C_0118h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
IADDR1
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1153