K60P100M100SF2RM Datasheet, PDF (1081/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 41 Low power timer (LPTMR)
41.4.3 LPTMR prescaler/glitch filter
The LPTMR prescaler and glitch filter share the same logic which operates as a prescaler
in time counter mode and as a glitch filter in pulse counter mode.
The prescaler/glitch filter configuration must not be altered when the LPTMR is enabled.
41.4.3.1 Prescaler enabled
In time counter mode when the prescaler is enabled, the output of the prescaler directly
clocks the LPTMR counter register. When the LPTMR is enabled, the LPTMR counter
register will increment every 2² to 2¹⁶ prescaler clock cycles. After the LPTMR is
enabled, the first increment of the LPTMR counter register will take an additional one or
two prescaler clock cycles due to synchronization logic.
41.4.3.2 Prescaler bypassed
In time counter mode when the prescaler is bypassed, the selected prescaler clock
increments the LPTMR counter register on every clock cycle. When the LPTMR is
enabled, the first increment will take an additional one or two prescaler clock cycles due
to synchronization logic.
41.4.3.3 Glitch filter
In pulse counter mode when the glitch filter is enabled, the output of the glitch filter
directly clocks the LPTMR counter register. When the LPTMR is first enabled, the
output of the glitch filter is asserted (logic one for active high and logic zero for active
low). If the selected input source remains negated for at least 2¹ to 2¹⁵ consecutive
prescaler clock rising edges, then the glitch filter output will also negate. If the selected
input source remains asserted for at least 2¹ to 2¹⁵ consecutive prescaler clock rising
edges, then the glitch filter output will also assert. Note that the input is only sampled on
the rising clock edge.
The LPTMR counter register will increment each time the glitch filter output asserts. In
pulse counter mode, the maximum rate at which the LPTMR counter register can
increment is once every 2² to 2¹⁶ prescaler clock edges. When first enabled, the glitch
filter will wait an additional one or two prescaler clock edges due to synchronization
logic.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1081