K60P100M100SF2RM Datasheet, PDF (1014/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
loading point. If the trigger event was a hardware trigger then the trigger enable bit
(TRIGn) is cleared according to Hardware Trigger. Examples with software and
hardware triggers follow.
system clock
write 1 to SWSYNC bit
SWSYNC bit
software trigger event
selected loading point
MOD register is updated
Figure 39-209. MOD Synchronization with (SYNCMODE = 0), (PWMSYNC = 0), (REINIT =
0), and (Software Trigger Was Used)
system clock
write 1 to TRIG0 bit
TRIG0 bit
trigger 0 event
selected loading point
MOD register is updated
Figure 39-210. MOD Synchronization with (SYNCMODE = 0), (HWTRIGMODE = 0),
(PWMSYNC = 0), (REINIT = 0), and (a Hardware Trigger Was Used)
If (SYNCMODE = 0), (PWMSYNC = 0) and (REINIT = 1) then this synchronization is
made on the next enabled trigger event. If the trigger event was a software trigger then
the SWSYNC bit is cleared according to the following example. If the trigger event was a
hardware trigger then the TRIGn bit is cleared according to Hardware Trigger. Examples
with software and hardware triggers follow.
1014
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.