K60P100M100SF2RM Datasheet, PDF (98/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Clock Modules
Peripheral
bridge
Register
access
Multipurpose Clock
Generator (MCG)
Topic
Full description
System memory map
Clocking
Power management
Signal multiplexing
Figure 3-17. MCG configuration
Table 3-32. Reference links to related information
Related module
MCG
Port control
Reference
MCG
System memory map
Clock distribution
Power management
Signal multiplexing
3.4.2 OSC Configuration
This section summarizes how the module has been configured in the chip. For a
comprehensive description of the module itself, see the module’s dedicated chapter.
Peripheral
bridge
Register
access
System oscillator
Module signals
Topic
Full description
System memory map
Clocking
Figure 3-18. OSC configuration
Table 3-33. Reference links to related information
Related module
OSC
Reference
OSC
System memory map
Clock distribution
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
98
Freescale Semiconductor, Inc.