K60P100M100SF2RM Datasheet, PDF (888/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
Absolute
address
(hex)
DAC memory map (continued)
Register name
Width
(in bits)
Access
Reset value
400C_C014 DAC Data Low Register (DAC0_DAT10L)
8
R/W
00h
400C_C015 DAC Data High Register (DAC0_DAT10H)
8
R/W
00h
400C_C016 DAC Data Low Register (DAC0_DAT11L)
8
R/W
00h
400C_C017 DAC Data High Register (DAC0_DAT11H)
8
R/W
00h
400C_C018 DAC Data Low Register (DAC0_DAT12L)
8
R/W
00h
400C_C019 DAC Data High Register (DAC0_DAT12H)
8
R/W
00h
400C_C01A DAC Data Low Register (DAC0_DAT13L)
8
R/W
00h
400C_C01B DAC Data High Register (DAC0_DAT13H)
8
R/W
00h
400C_C01C DAC Data Low Register (DAC0_DAT14L)
8
R/W
00h
400C_C01D DAC Data High Register (DAC0_DAT14H)
8
R/W
00h
400C_C01E DAC Data Low Register (DAC0_DAT15L)
8
R/W
00h
400C_C01F DAC Data High Register (DAC0_DAT15H)
8
R/W
00h
400C_C020 DAC Status Register (DAC0_SR)
8
R
02h
400C_C021 DAC Control Register (DAC0_C0)
8
R/W
00h
400C_C022 DAC Control Register 1 (DAC0_C1)
8
R/W
00h
400C_C023 DAC Control Register 2 (DAC0_C2)
8
R/W
0Fh
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36.4.1 DAC Data Low Register (DACx_DATL)
Addresses: 400C_C000h base + 0h offset + (2d × n), where n = 0d to 15d
Bit
7
6
5
4
3
2
1
0
Read
Write
DATA[7:0]
Reset
0
0
0
0
0
0
0
0
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
888
Freescale Semiconductor, Inc.