K60P100M100SF2RM Datasheet, PDF (803/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 34 Analog-to-Digital Converter (ADC)
In some packages, V_REFH is connected in the package to V_DDA and V_REFL to V_SSA. If
externally available, the positive reference(s) may be connected to the same potential as
V_DDA or may be driven by an external source to a level between the minimum Ref
Voltage High and the V_DDA potential (V_REFH must never exceed V_DDA). Connect the
ground references to the same voltage potential as V_SSA.
34.2.4 Analog channel inputs (ADx)
The ADC module supports up to 24 single-ended analog inputs. A single-ended input is
selected for conversion through the ADCH channel select bits when the DIFF bit in the
SC1n register is low.
34.2.5 Differential analog channel inputs (DADx)
The ADC module supports up to 4 differential analog channel inputs. Each differential
analog input is a pair of external pins (DADPx and DADMx) referenced to each other to
provide the most accurate analog to digital readings. A differential input is selected for
conversion through the ADCH channel select bits when the DIFF bit in the SC1n register
bit is high. All DADPx inputs may be used as single-ended inputs if the DIFF bit is low.
In certain MCU configurations, some DADMx inputs may also be used as single-ended
inputs if the DIFF bit is low. Refer to the Chip Configuration chapter for ADC
connections specific to this MCU.
34.3 Register Definition
This section describes the ADC registers.
Absolute
address
(hex)
ADC memory map
Register name
Width
(in bits)
Access
Reset value
4003_B000 ADC status and control registers 1 (ADC0_SC1A)
32
R/W 0000_001Fh
4003_B004 ADC status and control registers 1 (ADC0_SC1B)
32
R/W 0000_001Fh
4003_B008 ADC configuration register 1 (ADC0_CFG1)
32
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R/W 0000_0000h
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
803