K60P100M100SF2RM Datasheet, PDF (391/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 18 Memory Protection Unit (MPU)
18.3.8 Region Descriptor Alternate Access Control n
(MPU_RGDAACn)
Since software may adjust only the access controls within a region descriptor
(RGDn_WORD2) as different tasks execute, an alternate programming view of this 32-
bit entity is available. Writing to this register does not affect the descriptor’s valid bit.
Addresses: 4000_D000h base + 800h offset + (4d × n), where n = 0d to 11d
Bit 31
30
29
28
27
26
25
24
23
22
21
R
M3SM
W
20
19
18
M3UM
17
16
M2SM
[-14:1]
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
M2SM
[bit 0]
W
M2UM
M1SM
M1UM
M0SM
M0UM
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
MPU_RGDAACn field descriptions
Field
31
M7RE
30
M7WE
29
M6RE
28
M6WE
27
M5RE
26
M5WE
Bus master 7 read enable.
Description
0 Bus master 7 reads terminate with an access error and the read is not performed
1 Bus master 7 reads allowed
Bus master 7 write enable
0 Bus master 7 writes terminate with an access error and the write is not performed
1 Bus master 7 writes allowed
Bus master 6 read enable.
0 Bus master 6 reads terminate with an access error and the read is not performed
1 Bus master 6 reads allowed
Bus master 6 write enable
0 Bus master 6 writes terminate with an access error and the write is not performed
1 Bus master 6 writes allowed
Bus master 5 read enable.
0 Bus master 5 reads terminate with an access error and the read is not performed
1 Bus master 5 reads allowed
Bus master 5 write enable
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
391