K60P100M100SF2RM Datasheet, PDF (292/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory map and register definition
12.2.13 System Clock Gating Control Register 6 (SIM_SCGC6)
Address: SIM_SCGC6 is 4004_7000h base + 103Ch offset = 4004_803Ch
Bit 31
30
29
28
27
26
25
24
23
22
21
R0
1
0
0
RTC
W
PIT PDB
20
19
0
18
CRC
17
16
0
Reset 0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R
0
I2S
W
0
0
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
SIM_SCGC6 field descriptions
Field
31
Reserved
30
Reserved
29
RTC
Description
This read-only field is reserved and always has the value zero.
This read-only field is reserved and always has the value one.
RTC Clock Gate Control
This bit controls the clock gate to the RTC module.
28
Reserved
27
ADC0
0 Clock disabled
1 Clock enabled
This read-only field is reserved and always has the value zero.
ADC0 Clock Gate Control
This bit controls the clock gate to the ADC0 module.
26
Reserved
25
FTM1
0 Clock disabled
1 Clock enabled
This read-only field is reserved and always has the value zero.
FTM1 Clock Gate Control
This bit controls the clock gate to the FTM1 module.
0 Clock disabled
1 Clock enabled
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
292
Freescale Semiconductor, Inc.