K60P100M100SF2RM Datasheet, PDF (1619/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
Chapter 52 Secured digital host controller (SDHC)
SDHC_MMCBOOT field descriptions (continued)
0011b
0100b
0101b
0110b
0111b
...
1110b
1111b
SDCLK x 2^11
SDCLK x 2^12
SDCLK x 2^13
SDCLK x 2^14
SDCLK x 2^15
SDCLK x 2^22
Reserved
Description
52.4.24 Host Controller Version (SDHC_HOSTVER)
This register contains the vendor host controller version information. All bits are read
only and will read the same as the power-reset value.
Address: SDHC_HOSTVER is 400B_1000h base + FCh offset = 400B_10FCh
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
VVN
SVN
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 1
SDHC_HOSTVER field descriptions
Field
31–16
Reserved
15–8
VVN
Description
This read-only field is reserved and always has the value zero.
Vendor Version Number
These status bits are reserved for the vendor version number. The host driver shall not use this status.
7–0
SVN
00h
10h
11h
12h
All others
Freescale SDHC version 1.0
Freescale SDHC version 2.0
Freescale SDHC version 2.1
Freescale SDHC version 2.2
Reserved
Specification Version Number
These status bits indicate the host controller specification version.
01h
SD host specification version 2.0, supports test event register and ADMA.
All others Reserved
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1619