K60P100M100SF2RM Datasheet, PDF (1417/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
31–0
RXDATA
SPIx_RXFRn field descriptions
Receive Data
Description
Contains the received SPI data.
Chapter 49 SPI (DSPI)
49.4 Functional Description
The Serial Peripheral Interface (DSPI) block supports full-duplex, synchronous serial
communications between MCUs and peripheral devices. All communications are done
with SPI-like protocol.
The DSPI has the following configurations:
• SPI Configuration in which the DSPI operates as a basic SPI or a queued SPI.
The DCONF field in the DSPI Module Configuration Register (MCR) determines the
DSPI Configuration. See for the DSPI configuration values.
The CTARn registers hold clock and transfer attributes. The SPI configuration allows to
select which CTAR to use on a frame by frame basis by setting a field in the SPI
command. See DSPI Clock and Transfer Attributes Registers for information on the
fields of the CTAR registers.
Typical master to slave connections are shown in the following figure. When a data
transfer operation is performed, data is serially shifted a predetermined number of bit
positions. Because the modules are linked, data is exchanged between the master and the
slave. The data that was in the master shift register is now in the shift register of the
slave, and vice versa. At the end of a transfer, the TCF bit in the SR is set to indicate a
completed transfer.
DSPI Master
Shift Register
Baud Rate
Generator
SIN
SOUT
SCK
PCSx
SOUT
SIN
SCK
DSPI Slave
Shift Register
SS
Figure 49-91. SPI Serial Protocol Overview
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1417