K60P100M100SF2RM Datasheet, PDF (1436/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Initialization/Application Information
49.4.8.1 Stop Mode (External Stop Mode)
The DSPI supports the stop mode protocol. When a request is made to enter external stop
mode, the DSPI block acknowledges the request . If a serial transfer is in progress, the
DSPI waits until it reaches the frame boundary before it is ready to have its clocks shut
off .While the clocks are shut off, the DSPI memory-mapped logic is not accessible. The
states of the interrupt and DMA request signals cannot be changed while in External Stop
mode.
49.4.8.2 Module Disable Mode
Module disable mode is a block-specific mode that the DSPI can enter to save power.
Host CPU can initiate the module disable mode by setting the MDIS bit in the MCR. The
module disable mode can also be initiated by hardware. A power management block can
initiate the module disable mode by asserting the DOZE mode signal while the DOZE bit
in the MCR is set.
When the MDIS bit is set or the DOZE mode signal is asserted while the DOZE bit is set,
the DSPI negates Clock Enable signal at the next frame boundary. If implemented, the
Clock Enable signal can stop the clock to the non-memory mapped logic. When Clock
Enable is negated, the DSPI is in a dormant state, but the memory mapped registers are
still accessible. Certain read or write operations have a different effect when the DSPI is
in the module disable mode. Reading the RX FIFO Pop Register does not change the
state of the RX FIFO. Likewise, writing to the TX FIFO Push Register does not change
the state of the TX FIFO. Clearing either of the FIFOs has no effect in the module disable
mode. Changes to the DIS_TXF and DIS_RXF fields of the MCR have no effect in the
module disable mode. In the module disable mode, all status bits and register flags in the
DSPI return the correct values when read, but writing to them has no effect. Writing to
the TCR during module disable mode has no effect. Interrupt and DMA request signals
cannot be cleared while in the module disable mode.
49.5 Initialization/Application Information
This section describes how to initialize the DSPI module.
49.5.1 How to Manage DSPI Queues
The queues are not part of the DSPI, but the DSPI includes features in support of queue
management. Queues are primarily supported in SPI Configuration.
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.