K60P100M100SF2RM Datasheet, PDF (1079/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
Chapter 41 Low power timer (LPTMR)
LPTMRx_PSR field descriptions (continued)
00 Prescaler/glitch filter clock 0 selected
01 Prescaler/glitch filter clock 1 selected
10 Prescaler/glitch filter clock 2 selected
11 Prescaler/glitch filter clock 3 selected
Description
41.3.3 Low Power Timer Compare Register (LPTMRx_CMR)
Addresses: LPTMR0_CMR is 4004_0000h base + 8h offset = 4004_0008h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
W
COMPARE
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LPTMRx_CMR field descriptions
Field
31–16
Reserved
15–0
COMPARE
Description
This read-only field is reserved and always has the value zero.
Compare Value
When the LPTMR is enabled and the LPTMR Counter Register equals the value in the LPTMR Compare
Register and increments, the Timer Compare Flag is set and the Hardware Trigger asserts until the next
time the LPTMR Counter Register increments. If the LPTMR Compare Register is zero, the Hardware
Trigger will remain asserted until the LPTMR is disabled. If the LPTMR is enabled, the LPTMR Compare
Register should only be altered when the Timer Compare Flag is set.
41.3.4 Low Power Timer Counter Register (LPTMRx_CNR)
Addresses: LPTMR0_CNR is 4004_0000h base + Ch offset = 4004_000Ch
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
COUNTER
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
LPTMRx_CNR field descriptions
Field
31–16
Reserved
Description
This read-only field is reserved and always has the value zero.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1079