K60P100M100SF2RM Datasheet, PDF (1312/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definition
The FlexCAN module can store CAN messages for transmission and reception using
Mailboxes and Rx FIFO structures.
This module's memory map includes sixteen 128-bit message buffers (MBs) that occupy
the range from offset 0x80 to 0x17F.
Absolute
address
(hex)
CAN memory map
Register name
Width
(in bits)
Access
Reset value
4002_4000 Module Configuration Register (CAN0_MCR)
32
R/W D890_000Fh
4002_4004 Control 1 Register (CAN0_CTRL1)
32
R/W 0000_0000h
4002_4008 Free Running Timer (CAN0_TIMER)
32
R/W 0000_0000h
4002_4010 Rx Mailboxes Global Mask Register (CAN0_RXMGMASK)
32
R/W
FFFF_
FFFFh
4002_4014 Rx 14 Mask Register (CAN0_RX14MASK)
32
R/W
FFFF_
FFFFh
4002_4018 Rx 15 Mask Register (CAN0_RX15MASK)
32
R/W
FFFF_
FFFFh
4002_401C Error Counter (CAN0_ECR)
32
R/W 0000_0000h
4002_4020 Error and Status 1 Register (CAN0_ESR1)
32
R/W 0000_0000h
4002_4024 Interrupt Masks 2 Register (CAN0_IMASK2)
32
R/W 0000_0000h
4002_4028 Interrupt Masks 1 Register (CAN0_IMASK1)
32
R/W 0000_0000h
4002_402C Interrupt Flags 2 Register (CAN0_IFLAG2)
32
R/W 0000_0000h
4002_4030 Interrupt Flags 1 Register (CAN0_IFLAG1)
32
R/W 0000_0000h
4002_4034 Control 2 Register (CAN0_CTRL2)
32
R/W 00C0_0000h
4002_4038 Error and Status 2 Register (CAN0_ESR2)
32
R/W 0000_0000h
4002_4044 CRC Register (CAN0_CRCR)
32
4002_4048 Rx FIFO Global Mask Register (CAN0_RXFGMASK)
32
4002_404C Rx FIFO Information Register (CAN0_RXFIR)
32
Table continues on the next page...
R
0000_0000h
R/W
FFFF_
FFFFh
R
Undefined
Section/
page
48.3.2/
1316
48.3.3/
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48.3.4/
1324
48.3.5/
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48.3.6/
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48.3.7/
1327
48.3.8/
1328
48.3.9/
1329
48.3.10/
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48.3.11/
1334
48.3.12/
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48.3.13/
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48.3.14/
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48.3.15/
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48.3.16/
1342
48.3.17/
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48.3.18/
1344
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.