K60P100M100SF2RM Datasheet, PDF (745/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Table 30-2. EzPort Commands (continued)
Chapter 30 EzPort
Command
RESET
WRFCCOB
FAST_RDFCCOB
WRFLEXRAM
RDFLEXRAM
FAST_RDFLEXRAM
Description
Reset Chip
Write FCCOB Registers
Read FCCOB registers at high
speed
Write FlexRAM
Read FlexRAM
Read FlexRAM at high speed
Code
0xB9
0xBA
0xBB
0xBC
0xBD
0xBE
Address
Bytes
0
0
0
3¹
3¹
3¹
Data Bytes
0
12
1 - 12²
4
1+
1+²
Accepted when
secure?
Yes
Yes⁶
No
No
No
No
1. Address must be 32-bit aligned (two LSBs must be zero).
2. One byte of dummy data must be shifted in before valid data is shifted out.
3. Address must be 64-bit aligned (three LSBs must be zero).
4. A section is defined as the smaller of either half the size of FlexRAM or the flash sector size. Total number of data bytes
programmed must be a multiple of 8.
5. Bulk Erase is accepted when security is set only if the BEDIS status bit is not set.
6. Note that the Flash will be in NVM Special mode, restricting which types of commands can be executed through
WRITE_FCCOB when security is enabled.
30.3.1 Command Descriptions
This section describes the module commands.
30.3.1.1 Write Enable
The Write Enable command (WREN) sets the write enable register bit in the EzPort
status register. The write enable bit must be set for a write command (SP, SE, BE,
WRFCCOB or WRFLEXRAM) to be accepted. The write enable register bit clears on
reset, on a Write Disable command, and at the completion of write command. This
command should not be used if a write is already in progress.
30.3.1.2 Write Disable
The Write Disable command (WRDI) clears the write enable register bit in the status
register. This command should not be used if a write is already in progress.
30.3.1.3 Read Status Register
The Read Status Register command (RDSR) returns the contents of the EzPort status
register.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
745