K60P100M100SF2RM Datasheet, PDF (208/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Module Operation in Low Power Modes
• powered = Memory is powered to retain contents.
• low power = Flash has a low power state that retains configuration registers to
support faster wakeup.
• OFF = Modules are powered off; module is in reset state upon wakeup.
• wakeup = Modules can serve as a wakeup source for the chip.
Modules
NVIC
Mode Controller
LLWU¹
Regulator
LVD
Brown-out
Detection
DMA
Watchdog
EWM
1kHz LPO
System
oscillator (OSC)
MCG
Core clock
System clock
Bus clock
Flash
Portion of
SRAM_U²
Remaining
SRAM_U and
all of SRAM_L
Table 7-2. Module operation in low power modes
Stop
VLPR
VLPW
VLPS
LLS
Core modules
static
FF
FF
static
System modules
static
FF
FF
FF
FF
FF
static
static
static
static
FF
ON
low power
low power
low power
low power
ON
disabled
disabled
disabled
disabled
ON
ON
ON
ON
ON
static
FF
static
ON
OSCERCLK
optional
static -
MCGIRCLK
optional; PLL
optionally on
but gated
OFF
OFF
OFF
powered
low power
FF
FF
FF
ON
OSCERCLK
max of 4MHz
crystal
2 MHz IRC
FF
FF
static
Clocks
ON
OSCERCLK
max of 4MHz
crystal
2 MHz IRC
static
FF
static
static
static
static
ON
ON
OSCERCLK
max of 4MHz
crystal
limited to low
range/low
power
static - no clock static - no clock
output
output
2 MHz max
OFF
OFF
2 MHz max
2 MHz max
OFF
2 MHz max
2 MHz max
OFF
Memory and memory interfaces
1 MHz max
access - no
pgm
low power
low power
low power
low power
low power
OFF
OFF
OFF
OFF
low power
low power
low power
low power
low power
low power
Table continues on the next page...
VLLSx
OFF
FF
FF
low power
disabled
ON
OFF
OFF
OFF
ON
limited to low
range/low
power
OFF
OFF
OFF
OFF
OFF
low power in
VLLS3,2
low power in
VLLS3
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
208
Freescale Semiconductor, Inc.