K60P100M100SF2RM Datasheet, PDF (35/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Section Number
Title
Page
39.4.6 Edge-Aligned PWM (EPWM) Mode...........................................................................................................995
39.4.7 Center-Aligned PWM (CPWM) Mode........................................................................................................997
39.4.8 Combine Mode.............................................................................................................................................998
39.4.9 Complementary Mode..................................................................................................................................1006
39.4.10 Registers Updated from Write Buffers........................................................................................................1007
39.4.11 PWM Synchronization.................................................................................................................................1009
39.4.12 Inverting.......................................................................................................................................................1025
39.4.13 Software Output Control..............................................................................................................................1026
39.4.14 Deadtime Insertion.......................................................................................................................................1028
39.4.15 Output Mask.................................................................................................................................................1031
39.4.16 Fault Control................................................................................................................................................1032
39.4.17 Polarity Control............................................................................................................................................1035
39.4.18 Initialization.................................................................................................................................................1036
39.4.19 Features Priority...........................................................................................................................................1036
39.4.20 Channel Trigger Output...............................................................................................................................1037
39.4.21 Initialization Trigger....................................................................................................................................1038
39.4.22 Capture Test Mode.......................................................................................................................................1040
39.4.23 DMA............................................................................................................................................................1041
39.4.24 Dual Edge Capture Mode.............................................................................................................................1042
39.4.25 Quadrature Decoder Mode...........................................................................................................................1049
39.4.26 BDM Mode..................................................................................................................................................1054
39.4.27 Intermediate Load........................................................................................................................................1055
39.4.28 Global Time Base (GTB).............................................................................................................................1057
39.5 Reset Overview.............................................................................................................................................................1058
39.6 FTM Interrupts..............................................................................................................................................................1060
39.6.1 Timer Overflow Interrupt.............................................................................................................................1060
39.6.2 Channel (n) Interrupt....................................................................................................................................1060
39.6.3 Fault Interrupt..............................................................................................................................................1060
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
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