K60P100M100SF2RM Datasheet, PDF (1042/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional Description
Table 39-248. Clear CHnF Bit when DMA = 1
CHnIE
0
1
How CHnF Bit Can Be Cleared
CHnF bit is cleared either when the channel DMA transfer is done or by reading CnSC while CHnF is set and
then writing a 0 to CHnF bit.
CHnF bit is cleared when the channel DMA transfer is done.
39.4.24 Dual Edge Capture Mode
The dual edge capture mode is selected if FTMEN = 1 and DECAPEN = 1. This mode
allows to measure a pulse width or period of the signal on the input of channel (n) of a
channel pair. The channel (n) filter can be active in this mode when n is 0 or 2.
channel (n) input
system clock
synchronizer
D QD Q
CLK
CLK
Filter*
FTMEN
is filter
enabled?
DECAPEN
DECAP
MS(n)A
ELS(n)B:ELS(n)A
ELS(n+1)B:ELS(n+1)A
0
Dual edge capture
mode logic
1
CH(n)IE
CH(n)F
C(n)V[15:0]
channel (n)
interrupt
CH(n+1)IE
CH(n+1)F
C(n+1)V[15:0]
channel (n+1)
interrupt
* Filtering function for dual edge capture mode is only available in the channels 0 and 2
FTM counter
Figure 39-244. Dual Edge Capture Mode Block Diagram
The MS(n)A bit defines if the dual edge capture mode is one-shot or continuous.
The ELS(n)B:ELS(n)A bits select the edge that is captured by channel (n), and ELS(n
+1)B:ELS(n+1)A bits select the edge that is captured by channel (n+1). If both
ELS(n)B:ELS(n)A and ELS(n+1)B:ELS(n+1)A bits select the same edge, then it is the
period measurement. If these bits select different edges, then it is a pulse width
measurement.
In the dual edge capture mode, only channel (n) input is used and channel (n+1) input is
ignored.
If the selected edge by channel (n) bits is detected at channel (n) input, then CH(n)F bit is
set and the channel (n) interrupt is generated (if CH(n)IE = 1). If the selected edge by
channel (n+1) bits is detected at channel (n) input and (CH(n)F = 1), then CH(n+1)F bit is
set and the channel (n+1) interrupt is generated (if CH(n+1)IE = 1).
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K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.