K60P100M100SF2RM Datasheet, PDF (173/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Chapter 4 Memory Map
Table 4-2. Peripheral bridge 0 slot assignments (continued)
System 32-bit base address
0x4006_5000
0x4006_6000
0x4006_7000
0x4006_8000
0x4006_9000
0x4006_A000
0x4006_B000
0x4006_C000
0x4006_D000
0x4006_E000
0x4006_F000
0x4007_0000
0x4007_1000
0x4007_2000
0x4007_3000
0x4007_4000
0x4007_5000
0x4007_6000
0x4007_7000
0x4007_8000
0x4007_9000
0x4007_A000
0x4007_B000
0x4007_C000
0x4007_D000
0x4007_E000
0x4007_F000
Slot
number
Module
101 System oscillator (OSC)
102
I²C 0
103
I²C 1
104
105 —
106 UART 0
107 UART 1
108 UART 2
109 UART 3
110 —
111 —
112 —
113 —
114 USB OTG FS/LS
115 Analog comparator (CMP) / 6-bit digital-to-analog converter (DAC)
116 Voltage reference (VREF)
117 —
118 —
119 —
120 —
121 —
122 —
123 —
124 Low-leakage wakeup unit (LLWU)
125 Power management controller (PMC)
126 System Mode controller (SMC)
127 —
4.5.2 Peripheral Bridge 1 (AIPS-Lite 1) Memory Map
Table 4-3. Peripheral bridge 1 slot assignments
System 32-bit base address
0x4008_0000
Slot
number
0
Module
Peripheral bridge 1 (AIPS-Lite 1)
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
173