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K60P100M100SF2RM Datasheet, PDF (779/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
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Chapter 32 Memory-Mapped Cryptographic Acceleration Unit (MMCAU)
32.6.3.18 DES Key Setup (DESK)
The DESK command performs the initial key transformation (permuted choice 1) defined
by the DES algorithm on CA0 and CA1 with CA0 containing bits 1–32 of the key and
CA1 containing bits 33–64 of the key1 . If the DC bit is set, no shift operation performs
and the values C0 and D0 store back to CA0 and CA1 respectively. The DC bit should be
set for decrypt operations. If the DC bit is not set, a left shift by one also occurs and the
values C1 and D1 store back to CA0 and CA1 respectively. The DC bit should be cleared
for encrypt operations. If the CP bit is set and a key parity error is detected, CASR[DPE]
bit is set; otherwise, it is cleared.
32.6.3.19 Hash Function (HASH)
The HASH command performs a hashing operation on a set of registers and adds that
result to the value in CAA and stores the result in CAA. The specific hash function
performed is based on the HFx field as defined in this table.
This table uses the following terms:
• ROTRn(CAx): rotate CAx register right n times
• SHRn(CAx): shift CAx register right n times
Table 32-20. Hash Function Codes
HFx Code
0
1
2
3
4
5
6
7
8
9
A
B
HFx
Define
HFF
HFG
HFH
HFI
HFC
HFM
HF2C
HF2M
HF2S
HF2T
HF2U
HF2V
Hash Function
MD5 F()
MD5 G()
MD5 H(), SHA Parity()
MD5 I()
SHA Ch()
SHA Maj()
SHA-256 Ch()
SHA-256 Maj()
SHA-256 Sigma 0
SHA-256 Sigma 1
SHA-256 sigma 0
SHA-256 sigma 1
Hash Logic
(CA1 & CA2) | (CA1 & CA3)
(CA1 & CA3) | (CA2 & CA3)
CA1 ^ CA2 ^ CA3
CA2 ^ (CA1 | CA3)
(CA1 & CA2) ^ (CA1 & CA3)
(CA1 & CA2) ^ (CA1 & CA3) ^ (CA2 & CA3)
(CA4 & CA5) ^ (CA1 & CA6)
(CA0 & CA1) ^ (CA0 & CA2) ^ (CA1 & CA2)
ROTR2(CA0) ^ ROTR13(CA0) ^ ROTR22(CA0)
ROTR6(CA4) ^ ROTR11(CA4) ^ ROTR25(CA4)
ROTR7(CA8) ^ ROTR18(CA8) ^ SHR3(CA8)
ROTR17(CA8) ^ ROTR19(CA8) ^ SHR10(CA8)
1. The DES algorithm numbers the most significant bit of a block as bit 1 and the least significant as bit 64.
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
779
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