K60P100M100SF2RM Datasheet, PDF (1575/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
15–13
Reserved
12–0
BLKSIZE
Chapter 52 Secured digital host controller (SDHC)
SDHC_BLKATTR field descriptions (continued)
Description
When restoring transfer content prior to issuing a resume command, the host driver shall restore the
previously saved block count.
NOTE: Although the BLKCNT field is 0 after reset, the read of reset value is 0x1. This is because when
XFERTYP[MSBSEL] bit is 0, indicating a single block transfer, the read value of BLKCNT is
always 1.
0000h
0001h
0002h
...
FFFFh
Stop count
1 block
2 blocks
65535 blocks
This read-only field is reserved and always has the value zero.
Transfer Block Size
This register specifies the block size for block data transfers. Values ranging from 1 byte up to the
maximum buffer size can be set. It can be accessed only when no transaction is executing (that is after a
transaction has stopped). Read operations during transfers may return an invalid value, and write
operations will be ignored.
000h
001h
002h
003h
004h
...
1FFh
200h
...
800h
...
1000h
No data transfer
1 Byte
2 Bytes
3 Bytes
4 Bytes
511 Bytes
512 Bytes
2048 Bytes
4096 Bytes
52.4.3 Command Argument Register (SDHC_CMDARG)
This register contains the SD/MMC command argument.
Address: SDHC_CMDARG is 400B_1000h base + 8h offset = 400B_1008h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
CMDARG
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
1575