English
Language : 

K60P100M100SF2RM Datasheet, PDF (50/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual
Section Number
Title
Page
51.4 Functional description...................................................................................................................................................1523
51.4.1 Transmitter...................................................................................................................................................1523
51.4.2 Receiver.......................................................................................................................................................1529
51.4.3 Baud rate generation....................................................................................................................................1543
51.4.4 Data format (non ISO-7816)........................................................................................................................1545
51.4.5 Single-wire operation...................................................................................................................................1548
51.4.6 Loop operation.............................................................................................................................................1549
51.4.7 ISO-7816 / smartcard support......................................................................................................................1549
51.4.8 Infrared interface..........................................................................................................................................1554
51.5 Reset..............................................................................................................................................................................1555
51.6 System level interrupt sources......................................................................................................................................1555
51.6.1 RXEDGIF description..................................................................................................................................1556
51.7 DMA operation.............................................................................................................................................................1557
51.8 Application information................................................................................................................................................1557
51.8.1 Transmit/receive data buffer operation........................................................................................................1557
51.8.2 ISO-7816 initialization sequence.................................................................................................................1558
51.8.3 Initialization sequence (non ISO-7816).......................................................................................................1560
51.8.4 Overrun (OR) flag implications...................................................................................................................1561
51.8.5 Overrun NACK considerations....................................................................................................................1562
51.8.6 Match address registers................................................................................................................................1563
51.8.7 Modem feature.............................................................................................................................................1563
51.8.8 IrDA minimum pulse width.........................................................................................................................1564
51.8.9 Clearing 7816 wait timer (WT, BWT, CWT) interrupts..............................................................................1564
51.8.10 Legacy and reverse compatibility considerations........................................................................................1565
Chapter 52
Secured digital host controller (SDHC)
52.1 Introduction...................................................................................................................................................................1567
52.2 Overview.......................................................................................................................................................................1567
52.2.1 Supported types of cards..............................................................................................................................1567
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
50
Freescale Semiconductor, Inc.