K60P100M100SF2RM Datasheet, PDF (1258/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Memory Map/Register Definitions
USBx_CTL field descriptions (continued)
Field
0
USBENSOFEN
USB Enable
Description
Setting this bit causes the SIE to reset all of its ODD bits to the BDTs. Therefore, setting this bit
resets much of the logic in the SIE. When host mode is enabled, clearing this bit causes the
SIE to stop sending SOF tokens.
0 The USB Module is disabled.
1 The USB Module is enabled.
45.4.15 Address Register (USBx_ADDR)
The Address Register holds the unique USB address that the USB Module decodes when
in Peripheral mode (HOSTMODEEN=0). When operating in Host mode
(HOSTMODEEN=1) the USB Module transmits this address with a TOKEN packet.
This enables the USB Module to uniquely address an USB peripheral. In either mode, the
USB_EN bit within the control register must be set. The Address Register is reset to 0x00
after the reset input becomes active or the USB Module decodes a USB reset signal. This
action initializes the Address Register to decode address 0x00 as required by the USB
specification.
Addresses: USB0_ADDR is 4007_2000h base + 98h offset = 4007_2098h
Bit
7
6
5
4
3
2
1
0
Read
Write
LSEN
ADDR
Reset
0
0
0
0
0
0
0
0
USBx_ADDR field descriptions
Field
7
LSEN
6–0
ADDR
Low Speed Enable bit
Description
This bit informs the USB Module that the next token command written to the token register must be
performed at low speed. This enables the USB Module to perform the necessary preamble required for
low-speed data transmissions.
USB address
This 7-bit value defines the USB address that the USB Module decodes in peripheral mode, or transmit
when in host mode.
1258
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.