K60P100M100SF2RM Datasheet, PDF (957/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Field
0
CH0OM
Chapter 39 FlexTimer (FTM)
FTMx_OUTMASK field descriptions (continued)
Channel 0 Output Mask
Description
Defines if the channel output is masked (forced to its inactive state) or unmasked (it continues to operate
normally).
0 Channel output is not masked. It continues to operate normally.
1 Channel output is masked. It is forced to its inactive state.
39.3.14 Function for Linked Channels (FTMx_COMBINE)
This register contains the control bits used to configure the fault control, synchronization,
deadtime insertion, dual edge capture mode, complementary, and combine mode for each
pair of channels (n) and (n+1), where n equals 0, 2, 4, and 6.
Addresses: FTM0_COMBINE is 4003_8000h base + 64h offset = 4003_8064h
FTM1_COMBINE is 4003_9000h base + 64h offset = 4003_9064h
FTM2_COMBINE is 400B_8000h base + 64h offset = 400B_8064h
Bit 31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Bit 15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R0
0
W
Reset 0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
FTMx_COMBINE field descriptions
Field
31
Reserved
30
FAULTEN3
Description
This read-only field is reserved and always has the value zero.
Fault Control Enable for n = 6
Enables the fault control in channels (n) and (n+1).
This field is write protected. It can be written only when MODE[WPDIS] = 1.
0 The fault control in this pair of channels is disabled.
1 The fault control in this pair of channels is enabled.
Table continues on the next page...
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.
957