K60P100M100SF2RM Datasheet, PDF (246/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Module Signal Description Tables
Table 10-20. USB VREG Signal Descriptions
Chip signal name
Module signal Description
I/O
name
VOUT33
reg33_out
Regulator output voltage
O
VREGIN
reg33_in
Unregulated power supply
I
Chip signal name
CAN0_RX
CAN0_TX
Table 10-21. CAN 0 Signal Descriptions
Module signal
name
CAN Rx
CAN Tx
Description
CAN Receive Pin
CAN Transmit Pin
I/O
Input
Output
Chip signal name
CAN1_RX
CAN1_TX
Table 10-22. CAN 1 Signal Descriptions
Module signal
name
CAN Rx
CAN Tx
Description
CAN Receive Pin
CAN Transmit Pin
I/O
Input
Output
Table 10-23. SPI 0 Signal Descriptions
Chip signal name
Module signal Description
I/O
name
SPI0_PCS0
PCS0/SS
Master mode: Peripheral Chip Select 0 output
I/O
Slave mode: Slave Select input
SPI0_PCS[3:1]
PCS[3:1]
Master mode: Peripheral Chip Select 1 - 3
O
Slave mode: Unused
SPI0_PCS4
PCS4
Master mode: Peripheral Chip Select 4
O
Slave mode: Unused
SPI0_PCS5
PCS5/ PCSS
Master mode: Peripheral Chip Select 5 /
O
Peripheral Chip Select Strobe
Slave mode: Unused
SPI0_SIN
SIN
Serial Data In
I
SPI0_SOUT
SOUT
Serial Data Out
O
SPI0_SCK
SCK
Master mode: Serial Clock (output)
I/O
Slave mode: Serial Clock (input)
Table 10-24. I²C 0 Signal Descriptions
Chip signal name
Module signal Description
I/O
name
I2C0_SCL
SCL
Bidirectional serial clock line of the I²C system.
I/O
I2C0_SDA
SDA
Bidirectional serial data line of the I²C system.
I/O
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
246
Freescale Semiconductor, Inc.