K60P100M100SF2RM Datasheet, PDF (1548/1809 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Reference Manual

Functional description
ADDRESS
MARK
START
BIT
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
STOP
BIT
START
BIT
Figure 51-205. Nine bits of data with MSB first
51.4.4.3.4 Nine-bit format with parity enabled
START
BIT
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
BIT 7
PARITY
STOP
BIT
START
BIT
Figure 51-206. Eight bits of data with LSB first and parity
START
BIT
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
PARITY
STOP
BIT
START
BIT
Figure 51-207. Eight bits of data with MSB first and parity
51.4.4.3.5 Non-memory mapped tenth bit for parity
The most significant memory-mapped bit can be used for address mark wakeup.
START
BIT
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 6
ADDRESS
MARK
BIT 7
BIT 8
PARITY
STOP
BIT
START
BIT
Figure 51-208. Nine bits of data with LSB first and parity
ADDRESS
MARK
START
BIT
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
PARITY
STOP
BIT
START
BIT
Figure 51-209. Nine bits of data with MSB first and parity
51.4.5 Single-wire operation
Normally, the UART uses two pins for transmitting and receiving. In single-wire
operation, the RXD pin is disconnected from the UART and the UART implements a
half-duplex serial connection. The UART uses the TXD pin for both receiving and
transmitting.
TXINV
TRANSMITTER
Tx pin output
Tx pin input
RECEIVER
RXD
RXINV
Figure 51-210. Single-wire operation (C1[LOOPS] = 1, C1[RSRC] = 1)
1548
K60 Sub-Family Reference Manual, Rev. 6, Nov 2011
Freescale Semiconductor, Inc.